Synthesis of fault-tolerant combination schemes by introducing information redundancy.

In the article, based on the analysis of the specifics of the problem of increasing the fault tolerance of combinational integrated circuits, the requirements for such a code are formulated by the methods of excessive coding. A linear non-cyclic code with parity checks satisfying these requirements is proposed. The code fixes single errors, detects double errors and has the advantages that are essential for the task at hand. The efficiency of the proposed code is estimated.